EPC8QI100 vs EPC8QC100 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC8QI100 sa pamamagitan ng Intel at EPC8QC100 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC8QI100 EPC8QC100
Brand Intel Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Obsolete Obsolete
Uri ng Memory Flash (NOR, Enhanced Configuration PROM) Configuration PROM (Flash-based)
Laki ng Memory 8 Mbit 8 Mbit
Supply Voltage (Core) 3.3 V —
Supply Voltage (I/O) 3.3 V —
Interface Altera FPGA configuration serial/parallel (FPP) + JTAG (IEEE 1149.1) —
In-System Programmability IEEE Std. 1532 compliant —
Programming Language Jam STAPL —
Boundary Scan JTAG boundary-scan test supported —
Data Compression Yes (increases effective capacity) —
Configuration Controller On-chip, dedicated to Altera FPGAs —
Initiate-Configuration Pin nINIT_CONF (private JTAG instruction) —
Temperature na Operasyon -40C to +85C (industrial) 0C to +70C (Commercial)
Packhaging 100-PQFP (20 x 14 mm) 100-Pin PQFP (20 x 14 mm)
Uri ng Pagpapasok Surface Mount Surface Mount
Compatible FPGAs Stratix, Stratix II, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, Cyclone, Cyclone II, Arria GX, Stratix GX, Stratix II GX —
Tindminan RoHS Non-compliant (legacy PQFP, lead-bearing) [DATA_NEEDED: RoHS compliance]
Flash Access Time — 90 ns (~10 MHz)
Configuration Bus Width — 16-bit (DQ[])
Configuration Bandwidth — Up to 160 Mbps
Decompression Support — Yes (Altera proprietary)
Supported Configuration Modes — FPP, PS, AS (FPGA-dependent)
ISP Interface — JTAG (IEEE 1149.1)
Volte ng Pagbibigay — 3.3 V
Compatible FPGA Families — Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
Lead Free — [DATA_NEEDED: lead-free status]

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