EPF10K200EFC672-2 vs EPF10K200SFI672-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200EFC672-2 sa pamamagitan ng Intel at EPF10K200SFI672-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K200EFC672-2 | EPF10K200SFI672-2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 9,984 | 9984 |
| Typical Gates | 200,000 | — |
| Maximum User I/Os | 470 | — |
| Embedded Memory | 98,304 bits | — |
| Embedded Array Blocks (EABs) | 12 | 24 |
| Logic Array Blocks (LABs) | 624 | 1248 |
| Packhaging | 672-BBGA (FineLine BGA) | 672-pin FineLine BGA (FBGA) |
| Package Dimensions | 45 x 45 mm | — |
| Ball Pitch | 1.27 mm | — |
| Process Technology | 0.22 um CMOS | 0.22 µm (Arrow lists 0.42 µm) |
| Speed Grade | -2 | -2 |
| Propagation Delay | 0.4 ns | — |
| Temperature na Operasyon | 0 C to 70 C | Industrial (-40C to +85C) |
| Supply Voltage (Core) | [DATA_NEEDED: core Vcc] | — |
| Programmability | JTAG (IEEE 1149.1) / in-system | — |
| Tindminan RoHS | Compliant (per distributor listing) | Not compliant (per Arrow EU RoHS listing) |
| Logic Family | CMOS | — |
| System Gates | — | 200000 |
| User I/Os | — | 470 |
| Embedded Memory (EAB SRAM) | — | 96 Kbit |
| Distributed Memory | — | 98304 bits |
| Core Supply Voltage | — | 2.5 V |
| JTAG Boundary Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev 2.2 (3.3 V, 33/66 MHz) on -1 speed grade |
| Programming | — | SRAM-based, in-system programmable |