EPF10K200SFC672-1 vs EPF10K200SFC672-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200SFC672-1 sa pamamagitan ng Altera at EPF10K200SFC672-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K200SFC672-1 | EPF10K200SFC672-1X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | FLEX 10KE | FLEX-10KS |
| Family | FLEX 10KE (FLEX-10KS) | FLEX 10K (legacy) |
| Logic Elements / Cells | 9984 | — |
| Total RAM Bits | 98304 | — |
| Number of LABs/CLBs | 1248 | — |
| Number of User I/Os | 470 | — |
| Number of Gates | 200K system gates | — |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multi-volt) | — |
| Maximum Operating Frequency | 250 MHz | — |
| Propagation Delay | 0.4 ns | 0.4 ns |
| Process Technology | 0.22 µm CMOS, SRAM-based | — |
| Package Type | 672-ball FBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch | — |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0 °C to 70 °C (Commercial) |
| Programming Interface | JTAG (IEEE 1149.1) + serial/parallel passive configuration | — |
| Embedded Array Blocks (EABs) | 12 | 24 |
| Speed Grade | -1 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Architecture | — | Reconfigurable CMOS SRAM |
| Typical System Gates | — | 200,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gate count] |
| Logic Elements (LEs) | — | 9,984 |
| Logic Array Blocks (LABs) | — | 1,248 |
| Embedded RAM Bits | — | 98,304 |
| User I/O Pins | — | 470 |
| Core Supply Voltage | — | 2.375 V to 2.625 V (2.5 V nominal) |
| JTAG Support | — | IEEE Std. 1149.1 (adds up to 31,250 gates) |
| Packhaging | — | 672-ball FineLine BGA, 27 × 27 mm, 1.0 mm pitch |
| Logic Family | — | CMOS |
| Configuration Method | — | SRAM (volatile, reconfigurable at every power-up) |
| Design Tool | — | Quartus (legacy FLEX 10K support) |