EPF10K200SRC240-1 vs EPF10K200SRC240-2X Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200SRC240-1 sa pamamagitan ng Intel at EPF10K200SRC240-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPF10K200SRC240-2X EPF10K200SRC240-2X - FLEX 10K 200K Gates 9984 Cells FPGA | Altera

EPF10K200SRC240-2X - FLEX 10K 200K Gates 9984 Cells FPGA | Altera

EPF10K200SRC240-2X ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EPF10K200SRC240-1 EPF10K200SRC240-2X
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Manufacturer Intel (formerly Altera) —
Series FLEX-10KS FLEX 10KS
Family FLEX 10K Embedded Programmable Logic FLEX 10KE
Device Type FPGA - Field Programmable Gate Array —
Number of Logic Elements 9984 —
Number of LABs (Logic Array Blocks) 1248 —
Number of EABs (Embedded Array Blocks) 24 —
Total EAB RAM Bits 40960 —
Total SRAM Bits 98304 —
Typical System Gates 200000 —
Maximum System Gates 513000 —
Number of I/O Pins 182 —
Supply Voltage - Core 5.0 V —
Supply Voltage - I/O 3.3 V / 5.0 V (multiVolt) —
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon -40C to +85C (industrial) 0 C to +70 C (Commercial)
Packhaging / Kaso 240-BFQFP Exposed Pad (RQFP-240) —
Supplier Device Package 240-RQFP (32x32 mm) —
Speed Grade -1 (fastest) -2X (industrial, upper-mid speed)
Programmability SRAM-based, in-system via JTAG —
JTAG (IEEE 1149.1) Yes —
Tindminan RoHS [DATA_NEEDED: rohs status] —
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Cells — 9984
Logic Array Blocks (LABs) — 1248
Equivalent Gates — 200,000
Embedded RAM (approx.) — 98 Kbits
User I/Os (max in family) — 470
User I/Os (this package) — 182
Propagation Delay — 0.4 ns to 0.8 ns
Max Internal Frequency — 200 MHz
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 3.3 V (banks; 5 V tolerant inputs)
Packhaging — RQFP-240 (240-pin Power Quad Flat Pack, 34.6 x 34.6 mm, 0.5 mm pitch)
Process Technology — CMOS
Configuration Method — JTAG / Passive Serial (PS)
Boundary-Scan (JTAG) — IEEE 1149.1 compliant
Lead-Free / RoHS — [DATA_NEEDED: explicit lead-free status]
Level ng MSL — [DATA_NEEDED: moisture sensitivity level]

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