EPF10K200SRC240-2 vs EPF10K200SRC240-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200SRC240-2 sa pamamagitan ng Intel at EPF10K200SRC240-2X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF10K200SRC240-2X - FLEX 10K 200K Gates 9984 Cells FPGA | Altera
EPF10K200SRC240-2X ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF10K200SRC240-2 | EPF10K200SRC240-2X |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | FLEX 10KS | FLEX 10KS |
| Family | FLEX 10KS (FLEX 10KE/10KA generation) | FLEX 10KE |
| Number of Logic Elements (LEs) | 9984 | — |
| Number of Logic Array Blocks (LABs) | 1248 | — |
| Total RAM Bits | 98304 | — |
| Number of User I/Os | 182 | — |
| Number of Gates | 513000 | — |
| Core Supply Voltage | 2.375 V to 2.625 V (nominal 2.5 V) | — |
| Temperature na Operasyon | 0C to +70C (Commercial, TA) | 0 C to +70 C (Commercial) |
| Packhaging / Kaso | 240-BFQFP Exposed Pad (240-RQFP, 32x32 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Terminal Form | GULL WING | — |
| Number of Terminals | 240 | — |
| Speed Grade | -2 (~80 MHz internal, typical) | -2X (industrial, upper-mid speed) |
| Configuration Interface | IEEE 1149.1 JTAG + Altera EPC EEPROM | — |
| Process Technology | 0.42 micrometer CMOS SRAM | CMOS |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Logic Cells | — | 9984 |
| Logic Array Blocks (LABs) | — | 1248 |
| Equivalent Gates | — | 200,000 |
| Embedded RAM (approx.) | — | 98 Kbits |
| User I/Os (max in family) | — | 470 |
| User I/Os (this package) | — | 182 |
| Propagation Delay | — | 0.4 ns to 0.8 ns |
| Max Internal Frequency | — | 200 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | 3.3 V (banks; 5 V tolerant inputs) |
| Packhaging | — | RQFP-240 (240-pin Power Quad Flat Pack, 34.6 x 34.6 mm, 0.5 mm pitch) |
| Configuration Method | — | JTAG / Passive Serial (PS) |
| Boundary-Scan (JTAG) | — | IEEE 1149.1 compliant |
| Lead-Free / RoHS | — | [DATA_NEEDED: explicit lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: moisture sensitivity level] |