EPF10K250EBC600-3 vs EPF10K250EBC600-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K250EBC600-3 sa pamamagitan ng Intel at EPF10K250EBC600-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF10K250EBC600-2 - FLEX 10KE FPGA 250K Gates 600-BGA | Altera
EPF10K250EBC600-2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF10K250EBC600-3 | EPF10K250EBC600-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 12,160 LEs | — |
| Typical Gates | 250,000 | 250,000 |
| Maximum User I/O | 470 | — |
| Embedded Array Blocks (EABs) | 12 (each 2 Kbits) | 4096 (2,048 bits each) |
| Total Embedded Memory | 24 Kbits (RAM) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Dedicated Clock Inputs | 6 | — |
| Speed Grade | -3 | — |
| Core Supply Voltage | 3.3 V | 3.3 V |
| I/O Supply Voltage | 3.3 V (5 V tolerant) | — |
| Packhaging | 600-ball FineLine BGA | 600-ball FineLine BGA |
| Configuration Mode | Passive Serial / Passive Parallel / JTAG | PS, PPS, PPA, JTAG |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | SRAM-based CMOS | SRAM-based, 0.22 um CMOS |
| Usable Gates | — | 152,000 |
| Logic Elements (LEs) | — | 12,288 |
| Flip-Flops | — | 12,288 |
| Logic Array Blocks (LABs) | — | 80 (8 LEs each) |
| Embedded Memory Bits | — | 40,960 bits |
| Maximum User I/O Pins | — | 488 |
| I/O Banks | — | 12 |
| PLLs | — | 4 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL-2, SSTL-3 |
| Operating Temperature Grade | — | Commercial |
| Uri ng Pagpapasok | — | Surface Mount |