EPF10K30ETC144-2 vs EPF10K30ETI144-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K30ETC144-2 sa pamamagitan ng Intel at EPF10K30ETI144-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K30ETC144-2 | EPF10K30ETI144-3 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | FLEX 10KE | FLEX-10KE |
| Family | FLEX 10KE | FLEX-10KE Embedded Programmable Logic Device |
| Logic Elements | 1,728 | 1728 |
| Typical Gates | 30,000 | — |
| Maximum User I/Os | 102 | — |
| Logic Array Blocks (LABs) | 216 | 216 |
| Embedded Memory Bits | 24,576 | — |
| Embedded Array Blocks (EABs) | 6 | 6 |
| Packhaging | 144-LQFP (TQFP, 20x20 mm) | 144-LQFP (LFQFP) |
| Speed Grade | -2 | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | -40C to +85C (Industrial) |
| Core Voltage (VCCINT) | 2.5 V (2.375 V to 2.625 V) | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Internal Frequency | up to 80 MHz | — |
| Propagation Delay (typ.) | 0.6 ns | — |
| Configuration Method | SRAM, JTAG (IEEE 1149.1) | SRAM (volatile) + JTAG IEEE 1149.1 |
| Process Technology | CMOS, SRAM-based | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Gull Wing) |
| Tindminan RoHS | Compliant (lead-free) | Non-Compliant (Sn/Pb lead finish) |
| Embedded RAM | — | 24,576 bits |
| Maximum User I/O | — | 102 |
| Maximum Equivalent Gates | — | 119,000 |
| Pin-to-Pin Delay (Speed Grade) | — | 12.5 ns |
| Supply Voltage (Core) | — | 2.5 V / 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V / 3.3 V / 2.5 V (multi-volt) |
| Package Height | — | 1.6 mm |
| Lead Finish | — | Tin/Lead (Sn/Pb) |