EPF10K50STC144-2 vs EPF10K50ETI144-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K50STC144-2 sa pamamagitan ng Intel at EPF10K50ETI144-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K50STC144-2 - 50K Gates FLEX-10KS FPGA, 102 I/O, 144-TQFP | Intel
EPF10K50STC144-2 ObsoleteIntel
EPF10K50ETI144-2 - 50K Gates FLEX 10KE FPGA, 144-LQFP | Intel
EPF10K50ETI144-2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF10K50STC144-2 | EPF10K50ETI144-2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | FLEX-10KS | — |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gate Count | 50,000 gates | — |
| Logic Elements | 2,880 | — |
| Embedded RAM | 40,960 bits | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/O Pins | 102 | — |
| Embedded Array Blocks (EABs) | 20 (per datasheet family) | 10 |
| Maximum Internal Frequency | 66.67 MHz | — |
| Propagation Delay | 0.6 ns | — |
| Logic Family | CMOS | — |
| Core Voltage | 5.0 V | — |
| Packhaging | 144-TQFP (TQFP-144, 20x20 mm) | 144-LQFP (TQFP), 22 x 22 mm, 0.5 mm pitch |
| Terminal Form | Gull Wing | — |
| Temperature na Operasyon | 0 C to 70 C (Commercial) | -40C to +85C (Industrial) |
| Temperature Grade | Commercial | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1), Passive Serial/Parallel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | FLEX 10KE |
| Typical Gates | — | 50,000 |
| Maximum System Gates | — | 199,000 |
| Logic Elements (LEs) | — | 2,880 |
| Total RAM Bits | — | 40,960 |
| Maximum User I/O Pins (this package) | — | 102 |
| Maximum User I/O Pins (family) | — | 254 |
| Core Voltage (VCCINT) | — | 2.5 V |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Configuration Method | — | Serial Passive / JTAG (IEEE 1149.1) |
| Speed Grade | — | -2 (mid) |