EPF6010ATI100-2 vs EPF6010ANTC100-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6010ATI100-2 sa pamamagitan ng Altera at EPF6010ANTC100-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF6010ATI100-2 - FLEX 6000 10K Gates FPGA | Altera | 100-TQFP
EPF6010ATI100-2 ⚠ Huling PagbiliIntel
EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel
EPF6010ANTC100-2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF6010ATI100-2 | EPF6010ANTC100-2 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Family | FLEX 6000 | FLEX 6000 / FLEX 6000A |
| Logic Elements | 880 | 880 |
| Logic Array Blocks (LABs) | 88 | — |
| Usable Gates | 10,000 | — |
| User I/O Pins | 71 | — |
| Maximum Operating Frequency | 166.67 MHz | — |
| Process Technology | 0.42 µm CMOS | — |
| Core Voltage | 3.3 V | — |
| I/O Voltage | 3.3 V (5 V tolerant) | — |
| Packhaging | 100-pin TQFP (14×14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Configuration Technology | SRAM (volatile) | — |
| Temperature na Operasyon | -40 °C to +85 °C (industrial) | Commercial (0C to +70C) |
| Speed Grade | -2 | -2 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Dedicated Inputs per LAB | 4 | — |
| Programmable I/O Pins | — | 71 |
| Configuration Method | — | SRAM (volatile), in-system programmable |
| Programming Interface | — | IEEE 1149.1 (JTAG) / passive serial / EPC configuration device |
| Supply Voltage (VCCINT) | — | 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000) |
| I/O Standards Supported | — | TTL, CMOS, PCI (with clamping diodes) |
| Number of LABs | — | [DATA_NEEDED: LAB count] |
| Embedded Memory | — | [DATA_NEEDED: embedded RAM blocks] |
| Global Clock Networks | — | [DATA_NEEDED: global clock count] |
| Level ng MSL | — | 3 (168 hours) |
| Packaging | — | Tray (per Altera packing standard) |