EPF6024ATI144-1N vs EPF6024ATI144-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6024ATI144-1N sa pamamagitan ng Altera at EPF6024ATI144-3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF6024ATI144-1N - FLEX 6000 PLD, 24K Gates, 144-Pin TQFP | Intel (Altera)
EPF6024ATI144-1N ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EPF6024ATI144-1N | EPF6024ATI144-3N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | FLEX 6000 (EPF6024A) | FLEX 6000 |
| Logic Elements (LEs) | 2,560 | — |
| Typical Gates | 24,000 | 24,000 |
| Embedded Array Blocks (EABs) | 4 (4 Kbit RAM each) | — |
| Maximum User I/O | 117 | — |
| Maximum Frequency (fMAX) | 172 MHz | — |
| Core Supply Voltage | 3.3 V (3.0 V to 3.6 V) | 3.3 V |
| Process Technology | CMOS, SRAM-based | 0.5 µm SRAM CMOS |
| Packhaging | TQFP-144 (TQ144), 0.500 mm pitch | 144-LQFP (TQFP-144, 20x20 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (gull-wing) |
| Speed Grade | -1 (faster bin) | -3 (faster bin) |
| Temperature na Operasyon | -40 C to +85 C (industrial) | -40 C to +85 C (industrial) |
| I/O Standard Support | 3.3 V LVTTL/LVCMOS | — |
| Configuration Method | SRAM, in-system programmable (ISP) via JTAG | — |
| Tindminan RoHS | Lead-free / Compliant (N suffix) | Compliant (lead-free 'N' suffix) |
| Series | EPF6024A | — |
| Logic Elements | — | 1,960 |
| User I/O Pins | — | 117 |
| Configuration | — | SRAM, requires external configuration EPROM |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| I/O Standards | — | 3.3 V LVTTL/LVCMOS, 5.0 V tolerant on selected banks |
| Level ng MSL | — | 3 (168 hours) |
| Lead-Free Terminal Finish | — | Yes (N suffix) |
| Configuration Memory Required | — | EPC1, EPC2 or compatible |