EPF6024ATI144-1N vs EPF6024ATI144-3N 比較
詳細並排比較 EPF6024ATI144-1N 由 Altera 與 EPF6024ATI144-3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPF6024ATI144-1N - FLEX 6000 PLD, 24K Gates, 144-Pin TQFP | Intel (Altera)
EPF6024ATI144-1N ⚠ 最後購買機會
規格比較
| 參數 | EPF6024ATI144-1N | EPF6024ATI144-3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Family | FLEX 6000 (EPF6024A) | FLEX 6000 |
| Logic Elements (LEs) | 2,560 | — |
| Typical Gates | 24,000 | 24,000 |
| Embedded Array Blocks (EABs) | 4 (4 Kbit RAM each) | — |
| Maximum User I/O | 117 | — |
| Maximum Frequency (fMAX) | 172 MHz | — |
| Core Supply Voltage | 3.3 V (3.0 V to 3.6 V) | 3.3 V |
| Process Technology | CMOS, SRAM-based | 0.5 µm SRAM CMOS |
| 封裝 | TQFP-144 (TQ144), 0.500 mm pitch | 144-LQFP (TQFP-144, 20x20 mm) |
| 安裝類型 | Surface Mount | Surface Mount (gull-wing) |
| Speed Grade | -1 (faster bin) | -3 (faster bin) |
| 工作溫度 | -40 C to +85 C (industrial) | -40 C to +85 C (industrial) |
| I/O Standard Support | 3.3 V LVTTL/LVCMOS | — |
| Configuration Method | SRAM, in-system programmable (ISP) via JTAG | — |
| RoHS 狀態 | Lead-free / Compliant (N suffix) | Compliant (lead-free 'N' suffix) |
| Series | EPF6024A | — |
| Logic Elements | — | 1,960 |
| User I/O Pins | — | 117 |
| Configuration | — | SRAM, requires external configuration EPROM |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |
| I/O Standards | — | 3.3 V LVTTL/LVCMOS, 5.0 V tolerant on selected banks |
| MSL 等級 | — | 3 (168 hours) |
| Lead-Free Terminal Finish | — | Yes (N suffix) |
| Configuration Memory Required | — | EPC1, EPC2 or compatible |