EPF8820ARC208-4N vs EPF8636ARC208-4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF8820ARC208-4N sa pamamagitan ng Altera at EPF8636ARC208-4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF8820ARC208-4N | EPF8636ARC208-4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | FLEX 8000 | — |
| Usable Gates | 8,000 | 6,000 |
| Logic Elements (Cells) | 672 | — |
| Maximum Operating Frequency | 125 MHz | — |
| Propagation Delay | 5.5 ns | — |
| Number of User I/O | 152 | — |
| Dedicated Inputs | 4 | — |
| Core Voltage | 5 V (4.75 V to 5.25 V) | — |
| I/O Voltage | 3.3 V or 5 V (configurable) | — |
| Process Technology | 0.42 µm CMOS | 5 V CMOS, 0.42 um |
| Packhaging | 208-RQFP / BFQFP with exposed pad | 208-RQFP (28x28 mm) with exposed pad |
| Configuration Memory | SRAM (volatile) | — |
| Operating Temperature (Commercial) | 0 °C to +70 °C | — |
| Operating Temperature (Industrial) | -40 °C to +85 °C | — |
| In-Circuit Reconfigurability | Yes (via external configuration device or intelligent controller) | — |
| Boundary-Scan (JTAG) | Yes (IEEE 1149.1 compliant) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy 5 V family) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Product Family | — | FLEX 8000 |
| Device Series | — | EPF8636A |
| Logic Elements | — | 136 |
| Flip-Flops (Registers) | — | 504 |
| Maximum User I/O | — | 218 |
| Embedded RAM Blocks | — | 8 x 256 x 8 bits |
| Logic Block Type | — | 4-input LUT with fast-carry chain |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| I/O Voltage Tolerance | — | 3.3 V or 5 V |
| Speed Grade | — | -4 |
| Temperature na Operasyon | — | -40 C to +105 C |
| Configuration Method | — | Serial configuration EEPROM (in-system) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |