EPM240F100C5N vs EPM240GF100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240F100C5N sa pamamagitan ng Intel at EPM240GF100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240F100C5N | EPM240GF100C5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | 4.7 ns |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | 201.1 MHz |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Packhaging | 100-ball FineLine BGA (FBGA-100) | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) |
| Hanay ng Temperature na Operasyon | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | On-chip non-volatile Flash |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | JTAG (IEEE 1149.1) / Jam STAPL |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Compliant | Lead Free, RoHS compliant |
| Family | — | MAX II |
| Logic Elements / Macro Cells | — | 192 macro cells |
| User I/Os | — | 80 |
| Logic Family | — | CMOS |
| Process Technology | — | 0.18 um |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory | — | 8 Kbits |
| Temperature na Operasyon | — | -40 C to +125 C |