EPM240GF100C5N vs EPM570GF100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GF100C5N sa pamamagitan ng Intel at EPM570GF100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GF100C5N | EPM570GF100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Logic Elements / Macro Cells | 192 macro cells | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | 201.1 MHz | — |
| User I/Os | 80 | 76 |
| Logic Family | CMOS | — |
| Process Technology | 0.18 um | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | — |
| Packhaging | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40 C to +125 C | -40C to +125C (industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / Jam STAPL | IEEE 1532 / JTAG (IEEE 1149.1) ISP |
| Configuration Memory | On-chip non-volatile Flash | On-chip Flash (non-volatile) |
| Tindminan RoHS | Lead Free, RoHS compliant | Compliant (lead-free) |
| Device Family | — | MAX II |
| Logic Elements | — | 570 |
| Macrocells | — | 440 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Core Voltage | — | 1.8 V (internal) |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) |
| Logic Family / Process | — | CMOS, Flash-based LUT |
| LABs | — | 4 (16 macrocells per LAB) |