EPM240GT100I5 vs EPM570GT100I5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100I5 sa pamamagitan ng Intel at EPM570GT100I5 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GT100I5 | EPM570GT100I5 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Logic Elements | 240 | — |
| Equivalent Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| Propagation Delay (tPD) | 7.5 ns | 5.4 ns (typ) |
| User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 um, 6-layer-metal flash | — |
| Temperature na Operasyon | -40C to +100C (industrial) | -40 C to +100 C (Industrial, "I5") |
| Packhaging | TQFP-100 (GT100) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Package Body Size | 16 mm x 16 mm | — |
| Lead Pitch | 0.50 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Gull-wing leads) |
| Supply Voltage (Core) | 3.0 V to 3.6 V (VCCINT) | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Tindminan RoHS | Compliant | Compliant |
| Series | — | MAX II |
| Logic Elements (LE) | — | 570 |
| Macrocells | — | 440 |
| Maximum User I/O Pins | — | 76 |
| Internal Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| User I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory | — | 8 Kbits |
| Programmability | — | In-System Programmable (ISP) via JTAG, non-volatile flash |
| Configuration Time | — | Instant-On (< 1 ms, no external PROM required) |
| Typical Active Current | — | [DATA_NEEDED: typical active ICC] |
| Speed Grade | — | GT (fast) |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| Global Clock Networks | — | 4 |