EPM240M100C4N vs EPM240GM100I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240M100C4N sa pamamagitan ng Intel at EPM240GM100I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM240M100C4N - 192 Macrocell MAX II CPLD, 100-MBGA | Intel / Altera
EPM240M100C4N ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | EPM240M100C4N | EPM240GM100I5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Presyo ng Yunit (USD) | — | $39.77 |
| Series | MAX II | — |
| Device Family | EPM240 | — |
| Macro Cells | 192 | — |
| User I/Os | 80 | — |
| Propagation Delay (tPD) Max | 4.7 ns | — |
| Internal Operating Frequency | 247.5 MHz | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL | — |
| User Flash Memory | 8 Kbit | — |
| Programmability | In-System Programmable via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile on-chip flash (instant-on) | On-chip non-volatile flash (instant-on) |
| Logic Family | CMOS | — |
| Packhaging | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch | 100-ball Micro FineLine BGA (MBGA), 6 mm × 6 mm, 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Temperature na Operasyon | -40 C to +125 C (industrial) | -40 °C to +105 °C (industrial) |
| Tindminan RoHS | Lead Free (per DigiChip spec sheet) | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells per LAB) | — |
| MultiTrack Interconnect | Yes | — |
| Hot Socketing | Yes | — |
| Family | — | MAX II |
| Logic Elements (LE) | — | 240 |
| Equivalent Macrocells | — | 192 |
| User I/O Pins | — | 80 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Pin-to-Pin Delay (tPD1) | — | 4.7 ns |
| Maximum Operating Frequency | — | 300 MHz (internal) |
| Process Technology | — | 0.18 µm 6-layer-metal flash CMOS |
| Supply Voltage - Core (VCCINT) | — | 1.8 V |
| MultiVolt I/O (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5 V |
| RoHS / Lead-Free | — | Lead-free per package marking |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |