EPM240M100C4N vs EPM240M100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240M100C4N sa pamamagitan ng Intel at EPM240M100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM240M100C4N - 192 Macrocell MAX II CPLD, 100-MBGA | Intel / Altera
EPM240M100C4N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM240M100C4N | EPM240M100C5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Series | MAX II | — |
| Device Family | EPM240 | — |
| Macro Cells | 192 | — |
| User I/Os | 80 | 80 |
| Propagation Delay (tPD) Max | 4.7 ns | — |
| Internal Operating Frequency | 247.5 MHz | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | 1.8 V |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL | — |
| User Flash Memory | 8 Kbit | 8 Kbits |
| Programmability | In-System Programmable via JTAG (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile on-chip flash (instant-on) | On-chip Flash (non-volatile) |
| Logic Family | CMOS | CMOS |
| Packhaging | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch | 100-ball MBGA (Micro FBGA), 6 x 6 mm, 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Temperature na Operasyon | -40 C to +125 C (industrial) | -40 C to +125 C |
| Tindminan RoHS | Lead Free (per DigiChip spec sheet) | Compliant (lead-free) |
| Logic Array Blocks (LABs) | 4 (16 macrocells per LAB) | — |
| MultiTrack Interconnect | Yes | — |
| Hot Socketing | Yes | — |
| Family | — | MAX II |
| Logic Elements | — | 240 |
| Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 4.7 ns |
| Supply Voltage - I/O | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Process Technology | — | 0.18 µm CMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |