EPM240T100A5N vs EPM240GT100C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240T100A5N sa pamamagitan ng Altera at EPM240GT100C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM240T100A5N - 192-Macrocell MAX II CPLD, 100-TQFP | Intel / Altera
EPM240T100A5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM240T100A5N | EPM240GT100C4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Macro Cells | 192 | — |
| Logic Elements (LE) | 240 | 240 |
| User I/O Count | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Volte ng Pagbibigay | 2.5 V / 3.3 V | — |
| I/O Bank Count | 4 (multi-voltage) | — |
| Process Technology | 0.18 µm | 0.18-µm, 6-layer-metal flash CMOS |
| Configuration Memory | On-chip Flash (instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / In-System Programmable (ISP) |
| Packhaging | 100-pin TQFP (14 x 14 x 1.0 mm) | 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch |
| Temperature na Operasyon | 0C to +85C (commercial, "A5N" suffix) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Gull-Wing leads) |
| Tindminan RoHS | Compliant (Pb-free) | — |
| Equivalent Macrocells | — | 192 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Propagation Delay | — | 6.1 ns (max) |
| User I/O Pins (max) | — | 80 |
| On-chip Flash Memory (UFM) | — | 8 Kbits |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) |
| Hanay ng Temperature na Operasyon | — | 0°C to +85°C (Commercial) |
| Supply Voltage (Core) | — | 3.3 V |
| Lead-Free / RoHS | — | Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet] |