EPM240T100C3N vs EPM240GT100C3N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM240T100C3N sa pamamagitan ng Altera at EPM240GT100C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
EPM240GT100C3N EPM240GT100C3N - MAX II CPLD 240 LE TQFP-100 | Intel

EPM240GT100C3N - MAX II CPLD 240 LE TQFP-100 | Intel

EPM240GT100C3N ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro EPM240T100C3N EPM240GT100C3N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Series MAX II MAX II
Device Family MAX II CPLD (EPM240) MAX II G (instant-on, non-volatile CPLD)
Logic Elements (LE) 240 240
Macrocells 192 —
User I/O Pins 80 80
User Flash Memory (UFM) 8 Kbits 8 Kbits
Packhaging 100-pin TQFP (14x14 mm) TQFP-100 (GT100), 16 x 16 mm, 0.5 mm pitch
Configuration Memory Internal Flash (non-volatile) —
Pin-to-Pin Logic Delay (tPD) 4.4 ns (typical) —
Maximum Operating Frequency 200 MHz (internal oscillator) —
Core Supply Voltage (VCCINT) 3.0 V to 3.6 V —
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Programming Interface JTAG (IEEE 1149.1) / ISP —
Temperature na Operasyon 0 °C to +85 °C (commercial) 0 °C to +85 °C (commercial, suffix C)
Quiescent Current (typical) 35 mA —
Tindminan RoHS Compliant —
Uri ng Pagpapasok Surface Mount Surface Mount
Level ng MSL [DATA_NEEDED: MSL rating] —
Manufacturer — Intel (formerly Altera)
Equivalent Macrocells — 192
Pin-to-Pin Delay (tPD) — 4.7 ns
Process Technology — 0.18 µm 6-layer-metal flash
Core Voltage — 3.3 V
MultiVolt I/O Standards — LVTTL, LVCMOS, PCI, SSTL (1.5 V / 1.8 V / 2.5 V / 3.3 V)
Programmability — In-System Programmable (ISP) via JTAG
Lead-Free / RoHS — Lead Free, RoHS Compliant

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita