EPM240T100C3N vs EPM240T100I5 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240T100C3N sa pamamagitan ng Altera at EPM240T100I5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240T100C3N | EPM240T100I5 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX II | EPM240 |
| Device Family | MAX II CPLD (EPM240) | — |
| Logic Elements (LE) | 240 | 240 |
| Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Packhaging | 100-pin TQFP (14x14 mm) | TQFP-100 (100-pin) |
| Configuration Memory | Internal Flash (non-volatile) | — |
| Pin-to-Pin Logic Delay (tPD) | 4.4 ns (typical) | — |
| Maximum Operating Frequency | 200 MHz (internal oscillator) | — |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | -40C to +100C (industrial) |
| Quiescent Current (typical) | 35 mA | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: rohs status] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Family | — | MAX II |
| Device Sub-family | — | EPM240T100 |
| Equivalent Macrocells | — | 192 |
| Maximum User I/O Pins | — | 80 |
| Speed Grade | — | I5 |
| Core Voltage | — | 3.3 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Propagation Delay (typical) | — | 4-7 ns |