EPM240T100C3N vs EPM240T100I5 比較
詳細並排比較 EPM240T100C3N 由 Altera 與 EPM240T100I5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240T100C3N | EPM240T100I5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX II | EPM240 |
| Device Family | MAX II CPLD (EPM240) | — |
| Logic Elements (LE) | 240 | 240 |
| Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| 封裝 | 100-pin TQFP (14x14 mm) | TQFP-100 (100-pin) |
| Configuration Memory | Internal Flash (non-volatile) | — |
| Pin-to-Pin Logic Delay (tPD) | 4.4 ns (typical) | — |
| Maximum Operating Frequency | 200 MHz (internal oscillator) | — |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| 工作溫度 | 0 °C to +85 °C (commercial) | -40C to +100C (industrial) |
| Quiescent Current (typical) | 35 mA | — |
| RoHS 狀態 | Compliant | [DATA_NEEDED: rohs status] |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Family | — | MAX II |
| Device Sub-family | — | EPM240T100 |
| Equivalent Macrocells | — | 192 |
| Maximum User I/O Pins | — | 80 |
| Speed Grade | — | I5 |
| Core Voltage | — | 3.3 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Propagation Delay (typical) | — | 4-7 ns |