EPM240T100I5 vs EPM240T100C3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240T100I5 sa pamamagitan ng Intel at EPM240T100C3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240T100I5 | EPM240T100C3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Series | EPM240 | MAX II |
| Device Sub-family | EPM240T100 | — |
| Logic Elements (LE) | 240 | 240 |
| Equivalent Macrocells | 192 | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Maximum User I/O Pins | 80 | — |
| Packhaging | TQFP-100 (100-pin) | 100-pin TQFP (14x14 mm) |
| Temperature na Operasyon | -40C to +100C (industrial) | 0 °C to +85 °C (commercial) |
| Speed Grade | I5 | — |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Propagation Delay (typical) | 4-7 ns | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Device Family | — | MAX II CPLD (EPM240) |
| Macrocells | — | 192 |
| User I/O Pins | — | 80 |
| Configuration Memory | — | Internal Flash (non-volatile) |
| Pin-to-Pin Logic Delay (tPD) | — | 4.4 ns (typical) |
| Maximum Operating Frequency | — | 200 MHz (internal oscillator) |
| Core Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Quiescent Current (typical) | — | 35 mA |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |