EPM240T100I5N vs EPM240T100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240T100I5N sa pamamagitan ng Intel at EPM240T100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240T100I5N | EPM240T100C5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX II | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| On-chip User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 µm, 6-layer-metal flash | 0.18 µm, 6-layer-metal flash |
| Packhaging | TQFP-100 | 100-pin TQFP (T100), 14x14 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | 2.5 V / 3.3 V |
| I/O Bank Supply (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Typical Propagation Delay (tPD) | 7 ns (approx., I5 speed grade) | — |
| Hanay ng Temperature na Operasyon | -40 °C to +100 °C (industrial, I-temp) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| Tindminan RoHS | Compliant | Compliant (lead-free) |
| Configuration Storage | Non-volatile flash (instant-on, no external PROM) | — |
| Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial, 'C' suffix) |