EPM3032A-TC44-10N vs EPM3032ALC-44-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3032A-TC44-10N sa pamamagitan ng Altera at EPM3032ALC-44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3032ALC-44-10N - MAX 3000A CPLD, 32MC, 10ns, 44-PLCC | Altera
EPM3032ALC-44-10N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM3032A-TC44-10N | EPM3032ALC-44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 3000A | — |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | — |
| Logic Elements / LABs | 2 Logic Array Blocks | — |
| User I/O Pins | 34 | 34 |
| Bilang ng Pins | 44 | — |
| Packhaging | 44-pin TQFP | 44-pin PLCC |
| Pin-to-Pin Delay (tPD) | 10 ns (commercial speed grade) | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Programming Technology | EEPROM (in-system programmable via JTAG / IEEE 1532) | — |
| Output Enables | 6 global OE signals | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial, -N suffix) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC socket compatible) |
| Process Technology | CMOS EEPROM | — |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Logic Array Blocks (LABs) | — | 2 |
| Gates | — | 600 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.5 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Speed Grade | — | -10 (10 ns) |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP (IEEE Std. 1532) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |