EPM3032ATC44-7 vs EPM3064ATC44-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3032ATC44-7 sa pamamagitan ng Altera at EPM3064ATC44-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3032ATC44-7 | EPM3064ATC44-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Macro Cells | 32 | — |
| Logic Array Blocks | 2 | 4 |
| Usable Gates | 600 | 1.25K |
| Maximum User I/O | 34 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Counter Frequency (fCNT) | 138.9 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | MultiVolt, 3.3 V / 5 V tolerant | — |
| Temperature na Operasyon | 0 °C to +70 °C (commercial) | 0C to +70C (Commercial) |
| Packhaging | 44-pin TQFP | TQFP-44 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) ISP | IEEE Std. 1149.1 JTAG (ISP) |
| Output Options | Totem-pole or open-drain per I/O | — |
| Process Technology | CMOS EEPROM (non-volatile) | CMOS EEPROM |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free / Pb-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| User I/O Pins | — | 34 |
| Bilang ng Pin | — | 44 |
| Speed Grade | — | -7 (7.5 ns tPD) |
| Pin-to-Pin Propagation Delay | — | 7.5 ns |
| Maximum Counter Frequency | — | 192.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |