EPM3064ATC100-10N vs EPM3064ATC100-4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC100-10N sa pamamagitan ng Altera at EPM3064ATC100-4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ATC100-10N - MAX 3000A CPLD, 64 Macrocells, 66 I/O | Altera
EPM3064ATC100-10N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3064ATC100-10N | EPM3064ATC100-4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (EEPROM-based) |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 2 | 2 |
| Maximum User I/O Pins | 66 | 34 |
| Usable Gates | 1,250 | 1,250 (range 600 to 10,000 across family) |
| Pin-to-Pin Delay (tPD) | 10 ns | 4.5 ns |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| In-System Programmability | Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | Yes - JTAG compliant | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Program/Erase Cycles | 100 minimum | — |
| MultiVolt I/O | Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: industrial temp grade option] |
| Packhaging | 100-pin TQFP | 100-pin TQFP |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant (lead-free) | unknown |
| Macro Cells | — | 64 |
| Counter Frequency (fCNT) | — | 227.3 MHz |
| Internal Performance | — | 222.2 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Process Technology | — | CMOS EEPROM |
| Architecture | — | 5-level Altera MAX |