EPM3064ATC100-10NA vs EPM3064ATC100-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC100-10NA sa pamamagitan ng Intel at EPM3064ATC100-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3064ATC100-10NA - MAX 3000A CPLD, 64 Macrocells, 10ns, TQFP-100 | Intel (Altera)
EPM3064ATC100-10NA ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3064ATC100-10NA | EPM3064ATC100-7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 64 | 64 |
| User I/Os | 66 | — |
| Usable Gates | 1,250 | up to 1,250 |
| Logic Array Blocks (LABs) | 4 | 2 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX in MHz] | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Voltages | 2.5 V / 3.3 V / 5.0 V | — |
| Packhaging | TQFP-100 (0.5 mm pitch) | TQFP-100 |
| Configuration Memory | Non-volatile EEPROM | — |
| In-System Programming | IEEE Std. 1532 compliant | IEEE Std. 1149.1 (JTAG), IEEE Std. 1532 |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 °C to +70 °C (commercial) |
| Lead-Free / RoHS | Yes (NA suffix) | — |
| User I/O Pins | — | 66 |
| Propagation Delay (tPD) | — | 7.5 ns (pin-to-pin, -7 speed grade) |
| Maximum Internal Frequency | — | 166.7 MHz (-7 speed grade) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| Program Memory Technology | — | EEPROM (non-volatile) |
| Uri ng Pagpapasok | — | Surface Mount |
| Tindminan RoHS | — | [DATA_NEEDED: confirmed RoHS status from manufacturer page] |