EPM3064ATC44-10N vs EPM3064ALC44-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-10N sa pamamagitan ng Altera at EPM3064ALC44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ALC44-10N - MAX 3000A CPLD, 64 Macrocells, 34 I/O | Intel / Altera
EPM3064ALC44-10N ObsoletePagsanggunian na paghahambing
| Parametro | EPM3064ATC44-10N | EPM3064ALC44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 1250 | 1,250 |
| Macro Cells | 64 | — |
| User I/O Pins | 34 | 34 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 192.3 MHz | 227.3 MHz |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | CMOS EEPROM |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | — |
| Packhaging | TQFP-44 (10x10 mm) | 44-pin PLCC (LC44) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC socket compatible) |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: commercial / industrial grade] |
| Tindminan RoHS | Compliant | Compliant |
| Pin-Locking | Yes (across design iterations) | — |
| Product Family | — | MAX 3000A |
| Macrocells | — | 64 |
| Propagation Delay (tPD) | — | 10 ns |
| I/O Bank Voltage (VCCIO) | — | 3.0 V to 3.6 V (MultiVolt) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, IEEE 1532 compliant) |
| Open-Drain Output Option | — | Yes (per I/O pin) |
| Output Slew-Rate Control | — | Programmable |