EPM3064ATC44-10N vs EPM3064ALC44-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-10N sa pamamagitan ng Altera at EPM3064ALC44-7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3064ALC44-7N - 64-Macrocell MAX 3000A CPLD, 7.5ns, 44-PLCC | Intel / Altera
EPM3064ALC44-7N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM3064ATC44-10N | EPM3064ALC44-7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 1250 | 1,250 |
| Macro Cells | 64 | — |
| User I/O Pins | 34 | — |
| Logic Array Blocks (LABs) | 4 | 2 |
| Pin-to-Pin Delay (tPD) | 10 ns | 7.5 ns |
| Maximum Counter Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | — |
| Packhaging | TQFP-44 (10x10 mm) | 44-pin PLCC |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC socket compatible) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Pin-Locking | Yes (across design iterations) | — |
| Logic IC Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| Number of User I/O Pins | — | 34 |
| Maximum Frequency | — | 135.1 MHz |
| Core Technology | — | CMOS EEPROM |
| I/O Tolerance | — | 5 V-tolerant |
| In-System Programmability | — | Yes (IEEE Std 1149.1 JTAG) |
| Programming Software | — | Quartus II / Quartus Prime (legacy MAX+PLUS II supported) |