EPM3064ATC44-10N vs EPM3064ATC44-10NAF Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-10N sa pamamagitan ng Altera at EPM3064ATC44-10NAF sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF NrndPagsanggunian na paghahambing
| Parametro | EPM3064ATC44-10N | EPM3064ATC44-10NAF |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 1250 | 1250 |
| Macro Cells | 64 | 64 |
| User I/O Pins | 34 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | Yes (IEEE Std. 1149.1 JTAG) |
| Packhaging | TQFP-44 (10x10 mm) | TQFP-44 (10x10 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: industrial/commercial grade] |
| Tindminan RoHS | Compliant | Compliant |
| Pin-Locking | Yes (across design iterations) | Yes |
| Series | — | MAX 3000A |
| Logic Elements / LABs | — | 4 LABs (16 macrocells per LAB) |
| Number of I/O Pins | — | 34 |
| Propagation Delay (tPD, max) | — | 10 ns |
| I/O Voltage Tolerance | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) |
| Programmable Technology | — | EEPROM (non-volatile) |
| In-System Programmable | — | Yes (IEEE Std. 1532 compliant) |
| Lead Finish | — | Lead-free (NiPdAu, AF suffix) |
| Configuration Memory Cycles | — | 100 erase/program cycles |