EPM3064ATC44-7N vs EPM3064ATC44-7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATC44-7N sa pamamagitan ng Altera at EPM3064ATC44-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATC44-7N | EPM3064ATC44-7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 64 | — |
| Logic Array Blocks | 2 | 4 |
| Usable Gates | 1,250 | 1.25K |
| User I/O Pins | 34 | 34 |
| Bilang ng Pins | 44 | — |
| Speed Grade | -7 (7.5 ns pin-to-pin delay) | -7 (7.5 ns tPD) |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Maximum Counter Frequency | 192.3 MHz (-7 grade) | 192.3 MHz |
| Supply Voltage (VCC) | 3.3 V | — |
| MultiVolt I/O | 1.8 V / 2.5 V / 3.3 V | — |
| Programmability | EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| ISP Standard | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test (BST) | Built-in, JTAG-driven | — |
| Packhaging | 44-pin TQFP | TQFP-44 |
| Temperature na Operasyon | 0°C to +85°C (commercial) | 0C to +70C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | unknown |
| Macrocells | — | 64 |
| Bilang ng Pin | — | 44 |
| Pin-to-Pin Propagation Delay | — | 7.5 ns |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG (ISP) |
| Process Technology | — | CMOS EEPROM |