EPM3064ATI44-10N vs EPM3064ALI44-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-10N sa pamamagitan ng Altera at EPM3064ALI44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATI44-10N | EPM3064ALI44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 3000A | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Usable Gates | 1250 | — |
| User I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Logic Blocks | 4 | — |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fMAX) | 100 MHz | — |
| Programmable Type | In-System Programmable (EEPROM) | In System Programmable (ISP) |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | — |
| Temperature na Operasyon | -40C to +85C (Industrial, "N" suffix) | -40 C to +85 C (Industrial) |
| Packhaging | 44-pin TQFP | 44-pin PLCC (J-Lead) |
| Process Technology | CMOS EEPROM | — |
| Boundary-Scan Test | Built-in (JTAG) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (socketable PLCC) |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | — |
| Tindminan RoHS | Non-Compliant (per digchip datasheet excerpt) | — |
| Series | — | MAX 3000A |
| Number of Macrocells | — | 64 |
| Number of I/O | — | 34 |
| Logic Gates | — | 1250 gates |
| Number of Logic Elements/Blocks | — | 4 LABs |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Lead Free / RoHS Status | — | Lead Free, RoHS Compliant |
| Hot-Socketing Support | — | Yes |
| Configuration Memory | — | CMOS EEPROM (non-volatile) |