EPM3064ATI44-10NAD vs EPM3064ATI44-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-10NAD sa pamamagitan ng Altera at EPM3064ATI44-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ATI44-10NAD - MAX 3000A 64-Macrocell CPLD 44-TQFP | Altera
EPM3064ATI44-10NAD ObsoletePagsanggunian na paghahambing
| Parametro | EPM3064ATI44-10NAD | EPM3064ATI44-7N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 64 | — |
| Usable Gates | 1,250 | 1,250 gates |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| User I/Os (max) | 34 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 4.5 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Packhaging | TQFP-44 | 44-pin TQFP (10x10 mm, 0.8 mm pitch) |
| Temperature na Operasyon | -40C to +85C (Industrial) | — |
| Programming Interface | JTAG (IEEE Std. 1532 compliant) | IEEE 1149.1 JTAG |
| In-System Programmable | Yes | — |
| Tindminan RoHS | Compliant | Compliant (lead-free, 'N' suffix) |
| Uri ng Pagpapasok | Surface Mount | — |
| Logic Elements / Macrocells | — | 64 macrocells |
| Maximum Frequency (fMAX) | — | 135.1 MHz |
| Pin-to-Pin Logic Delay | — | 7 ns (speed grade -7) |
| User I/O Count | — | 34 I/O |
| Dedicated Input Pins | — | 4 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) |
| Program Memory Type | — | EEPROM (in-system programmable) |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Process Technology | — | 0.30 µm CMOS EEPROM |