EPM3064ATI44-7N vs EPM3064ATI44-4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-7N sa pamamagitan ng Altera at EPM3064ATI44-4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3064ATI44-7N | EPM3064ATI44-4N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | 64 macrocells |
| Usable Gates | 1,250 gates | 1,250 gates |
| Maximum Frequency (fMAX) | 135.1 MHz | — |
| Pin-to-Pin Logic Delay | 7 ns (speed grade -7) | — |
| User I/O Count | 34 I/O | — |
| Dedicated Input Pins | 4 | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| Programming Interface | IEEE 1149.1 JTAG | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP |
| Packhaging | 44-pin TQFP (10x10 mm, 0.8 mm pitch) | 44-pin TQFP |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| Tindminan RoHS | Compliant (lead-free, 'N' suffix) | [DATA_NEEDED: rohs status] |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Logic Array Blocks (LABs) | — | 4 LABs (16 macrocells each) |
| Maximum Operating Frequency | — | 222.2 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 4.5 ns (-4 speed grade) |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 3.3 V or 2.5 V |
| User I/O Pins | — | 34 I/O |
| Temperature na Operasyon | — | -40C to +85C (industrial) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Uri ng Pagpapasok | — | Surface Mount |