EPM3128ATC100-10NS vs EPM3128ATC100-10 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC100-10NS sa pamamagitan ng Intel at EPM3128ATC100-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3128ATC100-10NS EPM3128ATC100-10
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 —
User I/Os 80 80
Bilang ng Pin 100 —
Packhaging TQFP-100 100-pin TQFP
Pin-to-Pin Logic Delay (tPD) 10 ns —
Counter Frequency (fCNT) up to 227.3 MHz —
Supply Voltage - Core (VCCINT) 3.3 V —
Supply Voltage - I/O (VCCIO) 3.3 V or 2.5 V (5.0 V-tolerant inputs) —
Logic-Level Compatibility 5.0 V, 3.3 V, 2.5 V —
Programmability In-system (ISP), IEEE Std. 1532 —
Boundary Scan IEEE 1149.1 JTAG —
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
Temperature na Operasyon [DATA_NEEDED: operating temperature range] 0 C to 70 C (commercial)
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
Device Family — MAX 3000A
Macrocells — 128
Usable Gates — 2500
Propagation Delay (tPD) — 10 ns
Counter Frequency — 227.3 MHz
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage Tolerance — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
In-System Programming — IEEE Std. 1532 compliant (JTAG)
PCI Compliance — PCI Local Bus Specification Rev 2.2 (selected speed grades)
Logic Family — CMOS

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita