EPM3128ATC100-7 vs EPM3128ATC100-10N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC100-7 sa pamamagitan ng Intel at EPM3128ATC100-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3128ATC100-7 EPM3128ATC100-10N
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 128
Typical Gates 2500 —
User I/Os 80 —
Logic Elements / LABs 4 Logic Array Blocks (LABs) —
Propagation Delay (tPD) 7.5 ns 10 ns
Counter Frequency (fCNT) 129.9 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Voltage Tolerance 5.0 V tolerant inputs —
Programming Technology EEPROM (non-volatile, in-system programmable) —
ISP Standard IEEE Std. 1532 (JTAG) —
Packhaging 100-pin TQFP, 14x14 mm, 0.5 mm pitch 100-pin TQFP (14 x 14 x 1.0 mm)
Temperature na Operasyon 0C to +70C (Commercial) 0 °C to +70 °C (commercial)
Speed Grade -7 (fastest grade in family) —
Process Technology CMOS EEPROM —
Tindminan RoHS [DATA_NEEDED: RoHS status] Compliant
Lead-Free [DATA_NEEDED: lead-free status] Yes
Product Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 2500
Number of I/O — 80
Logic Elements / Blocks — 8 LABs (16 macrocells each)
Maximum Internal Frequency (fMAX) — 98 MHz
Supply Voltage VCCINT — 3.3 V
I/O Bank Voltage VCCIO — 3.3 V or 2.5 V (selectable)
Configuration Memory — CMOS EEPROM (non-volatile, instant-on)
In-System Programming — IEEE Std. 1532-compliant ISP via JTAG
Uri ng Pagpapasok — Surface Mount
Level ng MSL — 3 (per JEDEC J-STD-020)

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