EPM3128ATC144-5 vs EPM3128ATC144-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATC144-5 sa pamamagitan ng Altera at EPM3128ATC144-10N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3128ATC144-5 | EPM3128ATC144-10N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 3000A | MAX 3000A |
| Logic Family | CMOS | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 128 | — |
| Number of Logic Array Blocks (LABs) | 8 | — |
| Number of User I/Os | 96 | — |
| Device System Gates | 2500 | — |
| Product Terms per Macrocell | 32 | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns (speed grade -10) |
| Maximum Internal Frequency | 192.3 MHz | — |
| Number of Global Clocks | 2 | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| Supply Voltage (Core) | 3.3 V | — |
| Multi-Volt I/O Voltage | 2.5 V / 3.3 V / 5.0 V tolerant | — |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | — |
| JTAG / IEEE 1149.1 | Yes (boundary-scan + ISP) | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0 °C to +70 °C (commercial) |
| Packhaging | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) | 144-pin TQFP |
| Process Technology | 0.30 um CMOS EEPROM, 4 metal layers | — |
| Tindminan RoHS | Not Compliant (per Arrow distributor listing) | — |
| ECCN | EAR99 | — |
| HTS Code | 8542.31.00.55 | — |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 (up to 10,000 for full family) |
| Logic Array Blocks (LABs) | — | 8 |
| User I/Os | — | 96 |
| Counter Frequency (fCNT) | — | 98 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 3.3 V |
| MultiVolt I/O Support | — | 3.3 V / 2.5 V / 1.8 V |
| Configuration Memory | — | EEPROM (in-system programmable, non-volatile) |
| Uri ng Pagpapasok | — | Surface Mount |
| JTAG (IEEE 1149.1) | — | Yes (BST + pin-locking) |
| ISP (IEEE 1532) | — | Yes |