EPM3128ATI144-10N vs EPM7128AETC144-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3128ATI144-10N sa pamamagitan ng Intel at EPM7128AETC144-10N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3128ATI144-10N - 128-Macrocell MAX 3000A CPLD, 10ns | Intel / Altera
EPM3128ATI144-10N NrndIntel
EPM7128AETC144-10N - MAX 7000A CPLD, 128 Macros, 144-TQFP | Intel
EPM7128AETC144-10N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM3128ATI144-10N | EPM7128AETC144-10N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | MAX 3000A | MAX 7000A |
| Logic Type | CMOS EEPROM-based CPLD | — |
| Macrocells | 128 | — |
| Typical Gates | 2.5K | — |
| User I/Os | 96 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns (grade -10) |
| Maximum Internal Frequency | 98 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| Output Bank Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Packhaging | 144-pin TQFP | 144-pin TQFP (T144) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | Industrial -40C to +85C | 0 C to +70 C (commercial) |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | — |
| JTAG / Boundary Scan | Yes (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile EEPROM | CMOS EEPROM (non-volatile) |
| Tindminan RoHS | Compliant | [DATA_NEEDED: rohs status] |
| Number of Macros | — | 128 |
| Logic Gates | — | 2,500 usable gates |
| Number of I/O Pins | — | 100 (max user I/O) |
| Internal Frequency | — | Up to 250 MHz |
| I/O Standards | — | 2.5 V / 3.3 V / 5 V multiVolt |
| JTAG Support | — | IEEE 1149.1 compliant boundary-scan |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |