EPM3128ATI144-10N vs EPM7128AETC144-10N 对比
详细并排对比 EPM3128ATI144-10N 出自 Intel 和 EPM7128AETC144-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM3128ATI144-10N - 128-Macrocell MAX 3000A CPLD, 10ns | Intel / Altera
EPM3128ATI144-10N Nrnd
规格对比
| 参数 | EPM3128ATI144-10N | EPM7128AETC144-10N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.32 | $22.56 |
| Family | MAX 3000A | MAX 7000A |
| Logic Type | CMOS EEPROM-based CPLD | — |
| Macrocells | 128 | — |
| Typical Gates | 2.5K | — |
| User I/Os | 96 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns (grade -10) |
| Maximum Internal Frequency | 98 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| Output Bank Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| 封装 | 144-pin TQFP | 144-pin TQFP (T144) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | Industrial -40C to +85C | 0 C to +70 C (commercial) |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | — |
| JTAG / Boundary Scan | Yes (IEEE 1149.1) | — |
| Configuration Memory | Non-volatile EEPROM | CMOS EEPROM (non-volatile) |
| RoHS 状态 | Compliant | [DATA_NEEDED: rohs status] |
| Number of Macros | — | 128 |
| Logic Gates | — | 2,500 usable gates |
| Number of I/O Pins | — | 100 (max user I/O) |
| Internal Frequency | — | Up to 250 MHz |
| I/O Standards | — | 2.5 V / 3.3 V / 5 V multiVolt |
| JTAG Support | — | IEEE 1149.1 compliant boundary-scan |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |