EPM3256AQC208-10 vs EPM3256AQI208-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256AQC208-10 sa pamamagitan ng Altera at EPM3256AQI208-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 ObsoleteAltera
EPM3256AQI208-10 - MAX 3000A 256-Macro CPLD, 10ns, PQFP-208 | Altera
EPM3256AQI208-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM3256AQC208-10 | EPM3256AQI208-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Logic Family | CMOS (EEPROM-based) | — |
| Macrocells | 256 | — |
| Usable Gates | 5,000 | 5,000 |
| User I/Os | 161 | 161 |
| Bilang ng Pins | 208 | — |
| Packhaging | 208-BFQFP (PQFP, Gull Wing) | 208-pin PQFP (Plastic Quad Flat Pack), FQFP code |
| Pin-to-Pin Propagation Delay | 10 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Tolerance | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | — |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0C to +70C (Industrial suffix 'I' per part number) |
| PCI-SIG Compliance | Yes (speed grades -4, -5, -6, -7, -10) | — |
| Global Clock Networks | 4 (CLK, CLR, OE, GCLK) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (per lead-free 'Q' suffix) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 256 |
| Logic Elements / LABs | — | 16 Logic Array Blocks |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | 95.2 MHz |
| Internal Counter Speed | — | Up to 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programmability | — | EEPROM, In-System via JTAG (IEEE 1149.1) |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 |
| Terminal Form | — | Gull-wing SMD |