EPM3256AQC208-10 vs EPM3256AT1144-10S Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256AQC208-10 sa pamamagitan ng Altera at EPM3256AT1144-10S sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 ObsoletePagsanggunian na paghahambing
| Parametro | EPM3256AQC208-10 | EPM3256AT1144-10S |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Logic Family | CMOS (EEPROM-based) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | — |
| User I/Os | 161 | — |
| Bilang ng Pins | 208 | — |
| Packhaging | 208-BFQFP (PQFP, Gull Wing) | TQFP-144 |
| Pin-to-Pin Propagation Delay | 10 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Tolerance | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | — |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0C to +85C (commercial) |
| PCI-SIG Compliance | Yes (speed grades -4, -5, -6, -7, -10) | — |
| Global Clock Networks | 4 (CLK, CLR, OE, GCLK) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 2.5V / 3.3V / 5.0V MultiVolt |
| Programmable Interconnect | — | EEPROM-based, non-volatile |
| In-System Programming | — | Yes, via IEEE 1149.1 JTAG |
| Configuration Cells | — | EEPROM (instant-on, no external PROM) |