EPM3256ATC144-10 vs EPM3256ATC144-7 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3256ATC144-10 sa pamamagitan ng Intel at EPM3256ATC144-7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3256ATC144-10 EPM3256ATC144-7
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Manufacturer Intel (formerly Altera) —
Series MAX 3000A —
Device Type CPLD - Complex Programmable Logic Device —
Programmable Type In-System Programmable (EEPROM-based, IEEE 1532) —
Macrocells 256 256
Logic Array Blocks (LABs) 16 —
Usable Gates 5,000 —
Number of I/O Pins 116 —
Propagation Delay (tpd max) 10 ns —
Counter Frequency (max) 95.2 MHz —
Core Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) —
I/O Logic Level Support MultiVolt - 5.0 V, 3.3 V, 2.5 V —
Temperature na Operasyon 0 C to +70 C (Commercial) 0C to +70C (Commercial)
Packhaging 144-pin TQFP (20x20 mm) TQFP-144 (LFQFP, gull-wing)
Uri ng Pagpapasok Surface Mount Surface Mount
JTAG / Boundary Scan Yes (IEEE 1149.1) —
Process Technology CMOS EEPROM —
Tindminan RoHS Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free —
Family — MAX 3000A
User I/Os — 116
Logic Elements / Gates — 600 to 10,000 usable gates
Propagation Delay (tPD) — 7.5 ns
Counter Frequency (fCNT) — 227.3 MHz
Speed Grade — -7
Supply Voltage - Core (VCCINT) — 3.3 V
Supply Voltage - I/O (VCCIO) — 2.5 V / 3.3 V / 5.0 V
In-System Programming — IEEE Std. 1532 compliant, 3.3 V ISP
Bilang ng Pin — 144
PCI Compliance — PCI Local Bus Specification Revision 2.2 (speed grades -4 to -10)
JTAG Support — IEEE Std. 1149.1 boundary-scan

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita