EPM3512AFC256-23 vs EPM3512AFC256-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFC256-23 sa pamamagitan ng Altera at EPM3512AFC256-2N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3512AFC256-23 - MAX 3000A CPLD, 512 Macrocells, 256-BGA | Altera
EPM3512AFC256-23 ObsoletePagsanggunian na paghahambing
| Parametro | EPM3512AFC256-23 | EPM3512AFC256-2N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 32 |
| Maximum Operating Frequency | 178.6 MHz | [DATA_NEEDED: fMAX in MHz] |
| Propagation Delay (tPD) | 5.5 ns | [DATA_NEEDED: tPD in ns] |
| Pin-to-Pin Delay | 23 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| User I/O Pins | [DATA_NEEDED: user I/O count for FC256] | — |
| Packhaging | 256-ball FineLine BGA (FC256), 17 mm x 17 mm | 256-ball FineLine BGA (FC-256) |
| Programming Interface | JTAG (IEEE Std. 1149.1) / ISP | — |
| Process Technology | 0.30 µm CMOS EEPROM | 0.30 µm CMOS EEPROM |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Maximum User I/O Pins | — | 212 |
| Configuration Memory | — | Non-volatile EEPROM |
| In-System Programmability | — | IEEE Std. 1532 JTAG |
| VCCINT (Core Supply) | — | 3.3 V |
| VCCIO (I/O Supply) | — | 2.5 V / 3.3 V / 5.0 V MultiVolt |
| PCI Compliance | — | 3.3 V PCI-compliant |
| Operating Temperature (Commercial) | — | 0 °C to +70 °C |
| Tindminan RoHS | — | Compliant |
| Lead-Free | — | Yes |