EPM3512AFC256-2N vs EPM3512AFC256-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFC256-2N sa pamamagitan ng Intel at EPM3512AFC256-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3512AFC256-2N | EPM3512AFC256-3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 32 | 16 |
| Maximum User I/O Pins | 212 | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX in MHz] | 116.3 MHz |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Configuration Memory | Non-volatile EEPROM | Non-volatile EEPROM |
| In-System Programmability | IEEE Std. 1532 JTAG | — |
| VCCINT (Core Supply) | 3.3 V | — |
| VCCIO (I/O Supply) | 2.5 V / 3.3 V / 5.0 V MultiVolt | — |
| PCI Compliance | 3.3 V PCI-compliant | — |
| Packhaging | 256-ball FineLine BGA (FC-256) | 256-ball FineLine BGA (FC-256) |
| Operating Temperature (Commercial) | 0 °C to +70 °C | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10,000 |
| Pin-to-Pin Delay (tPD) | — | 3.5 ns (speed grade -3) |
| Speed Grade | — | -3 (slowest in family) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE 1149.1) / IEEE Std. 1532 ISP |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temperature grade] |