EPM3512AFC256C vs EPM3512AFC256-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AFC256C sa pamamagitan ng Intel at EPM3512AFC256-7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3512AFC256C - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera
EPM3512AFC256C ⚠ Huling PagbiliAltera
EPM3512AFC256-7N - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera
EPM3512AFC256-7N ObsoletePagsanggunian na paghahambing
| Parametro | EPM3512AFC256C | EPM3512AFC256-7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/Os | 208 | — |
| Dedicated Input Pins | 12 | — |
| Packhaging | 256-ball FineLine BGA (FC) | 256-pin FineLine BGA (FBGA-256), 1.0 mm pitch |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0 C to 70 C (commercial) |
| Speed Grade | C (per datasheet ordering code) | — |
| Configuration Technology | EEPROM (non-volatile, instant-on) | — |
| Core Voltage | 3.3 V | — |
| I/O Standards Supported | MultiVolt: 5.0 V, 3.3 V, 2.5 V | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| PCI Compliance | PCI SIG Local Bus Specification Revision 2.2 | — |
| Programming | In-system programmable via JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10,000 |
| User I/Os | — | 208 |
| Logic Blocks | — | 16 (32 macrocells each) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant I/O | — | Yes |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Process Technology | — | CMOS EEPROM, 0.30 um |