EPM3512AQI208-10N vs EPM3512AQC208-10-10N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512AQI208-10N sa pamamagitan ng Intel at EPM3512AQC208-10-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM3512AQI208-10N EPM3512AQC208-10-10N
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Logic Family CMOS EEPROM-based —
Macro Cells 512 —
Logic Array Blocks (LABs) 12 —
User I/Os 172 (max), 208-pin package 172
Propagation Delay (tPD) 10 ns 10 ns (-10 speed grade)
Volte ng Pagbibigay 3.3 V —
I/O Standards MultiVolt (2.5 V / 3.3 V / 5 V tolerant) —
Package Type PQFP-208 (FINE LINE BGA-style 256-pin land) —
Pins 256 (package), 208 used —
Temperature na Operasyon 0C to 70C 0 °C to +70 °C (commercial)
Uri ng Pagpapasok Surface Mount Surface Mount
Programming Interface JTAG (IEEE 1149.1) / ISP (IEEE 1532) —
Compliance RoHS status unknown from data —
Boundary Scan Built-in BST (IEEE 1149.1) —
Configuration Memory On-chip EEPROM, non-volatile —
Macrocells — 512
Usable Gates — 10,000
Logic Elements / LABs — 16 Logic Array Blocks
Maximum Frequency (fCNT) — 87 MHz
Supply Voltage - Core (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V
Process Technology — CMOS EEPROM
In-System Programmability — Yes, IEEE Std. 1532 compliant
Boundary-Scan (JTAG) — Yes, IEEE 1149.1
PCI-SIG Compliance — PCI Local Bus Specification Rev 2.2 (at -10 speed grade)
Packhaging — 208-pin PQFP (Plastic Quad Flat Pack)
Lead-Free / RoHS — [DATA_NEEDED: RoHS status]

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