EPM3512ATI256-10N vs EPM3512ATC256-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3512ATI256-10N sa pamamagitan ng Intel at EPM3512ATC256-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM3512ATI256-10N | EPM3512ATC256-10N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Intel (formerly Altera Corporation) | — |
| Family | MAX 3000A | MAX 3000A |
| Device | EPM3512A | — |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O | 212 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Packhaging | 256-pin BGA (TI256) | FBGA-256 (FineLine BGA, 17x17 mm, 1.0 mm pitch) |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0 C to +70 C (commercial, "C" suffix) |
| Core Voltage | 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan, 4-pin JTAG | — |
| Programmable Security Bit | Yes (design protection) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Katayuan ng Lifecycle | Obsolete / Last Time Buy (per Altera product discontinuation notices) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 208 |
| Propagation Delay (tPD1) | — | 10 ns |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) - in-system programmable |
| Process Technology | — | 0.30 um CMOS EEPROM |
| Lead-Free | — | unknown |