EPM5016DC-17 vs EPM5016LC-17 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5016DC-17 sa pamamagitan ng Altera at EPM5016LC-17 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5016DC-17 | EPM5016LC-17 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 EPLD |
| Macrocells | 16 | 16 |
| Logic Elements | [DATA_NEEDED: LE count for MAX 5000 family] | — |
| User I/O Pins (max) | 24 | — |
| Propagation Delay (tPD) | 17 ns | 17 ns |
| Counter Frequency (fCNT) | 67 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| I/O Standard | TTL-compatible | — |
| Process Technology | 0.75 micron CMOS EEPROM | — |
| Packhaging | Ceramic DIP-24 (DC suffix) | Windowed Ceramic DIP (LC) |
| Bilang ng Pin | 24 | — |
| Uri ng Pagpapasok | Through-hole | — |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| In-System Programmability | Yes (ByteBlaster / BitBlaster) | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Tindminan RoHS | [DATA_NEEDED: confirmed compliance status from manufacturer] | [DATA_NEEDED: RoHS compliance] |
| Technology | — | CMOS, UV-erasable |
| Product Terms | — | 160 |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 8 |
| Total Input Pins | — | 16 |
| Outputs | — | 8 |
| External Clock Inputs | — | 1 |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| Volte ng Pagbibigay | — | [DATA_NEEDED: VCC range] |
| Logic Compatibility | — | TTL/CMOS |