EPM5016DI-20 vs EPM5016DC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5016DI-20 sa pamamagitan ng Altera at EPM5016DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5016DI-20 | EPM5016DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | EPLD (UV-erasable CMOS) | — |
| Macrocells | 16 | 16 |
| Propagation Delay (tPD) | 20 ns | — |
| Maksimum na Taktiko ng Oras | 62.5 MHz | — |
| Total Inputs | 16 | — |
| Dedicated Inputs | 7 | 4 |
| Configurable I/O Pins | 8 | — |
| External Clock Inputs | 1 | — |
| Product Terms per Output | 8 | — |
| Output Functions per Macrocell | 8 | — |
| Technology | CMOS EPROM | — |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| Packhaging | 20-pin Ceramic DIP (DI), windowed | Ceramic DIP-24 (windowed) |
| Speed Grade | -20 (20 ns tPD) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (commercial) |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC nominal] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 2 |
| User I/O Pins | — | 12 |
| Pin-to-Pin Delay (tpd) | — | 15 ns |
| Maximum Frequency (fmax) | — | 71 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programming Voltage (VPP) | — | 12.75 V |
| Uri ng Pagpapasok | — | Through-Hole |
| Process Technology | — | CMOS EPROM |
| Configuration Memory | — | Non-volatile UV-erasable EPROM |
| Lead Finish | — | [DATA_NEEDED: lead-free status] |