EPM5032DC-20 vs EPM5032DC-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DC-20 sa pamamagitan ng Intel at EPM5032DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5032DC-20 EPM5032DC-15
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Product Family MAX 5000 —
Device Type CPLD (Complex Programmable Logic Device) UV-erasable EPLD (PAL-type CMOS)
Programmable Technology UV-Erasable / OTP EPROM —
Usable Gates 600 600
Macrocells 32 32
Maximum Frequency (fCNT) 71.4 MHz —
Pin-to-Pin Delay (tPD) 20 ns —
Speed Grade -20 —
Supply Voltage (VCC) 5 V 5 V (nominal)
Packhaging 20-pin DIP (Windowed Ceramic, 0.3" wide) CERDIP-28 (windowed, through-hole)
Uri ng Pagpapasok Through-Hole Through-Hole (DIP)
Logic Blocks 4 Logic Array Blocks (LABs) —
I/O Pins [DATA_NEEDED: I/O pin count for DIP-20 variant] —
Temperature na Operasyon [DATA_NEEDED: commercial/industrial/military grade] 0C to +70C (commercial)
Tindminan RoHS Compliant (per IC-Components listing) [DATA_NEEDED: RoHS status]
Lead Free [DATA_NEEDED: confirmed lead-free] —
Manufacturer Altera (now Intel Programmable Solutions Group) —
Programming Method Altera MAX+PLUS II / Quartus (legacy support) —
Family — MAX 5000
Propagation Delay (tPD) — 15 ns
Maximum Toggle Frequency (fMAX) — 83.3 MHz
Logic Family — CMOS, TTL-compatible I/O
Programmable Pins — 16 bidirectional I/O + 4 dedicated input = 20
Total Package Pins — 28
Erasure Method — UV light through ceramic quartz window
Process Technology — CMOS
Lead-Free — unknown

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